Cavium Breaks 100Gbps IPsec Throughput Barrier using OpenDataPlane™ at Mobile World Congress 2015
OCTEON® III 48 Core 64bit Processor SoC Provides 2.5X+ Performance Boost delivering the critical secure backhaul requirements for future LTE-A and 5G Wireless Core Network Applications
Mobile World Congress – Barcelona, Spain March 2, 2015 – Cavium, Inc., (NASDAQ: CAVM), a leading provider of semiconductor products that enable intelligent processing for enterprise, data center, wired and wireless networking, will demonstrate its single-chip OCTEON III processor running a full IPsec security application at 100Gbps throughput, necessary for next generation LTE-A and 5G networks using standard OpenDataPlane (ODP) software API’s at Mobile World Congress 2015.
Secure transport throughput requirements in wireless networks are growing exponentially, creating the need for much higher performance processors with advanced security acceleration in next-generation equipment. The Cavium OCTEON III 48-core 64-bit CN78xx processor is ideally suited for use in 4G/LTE Evolved Packet Core (EPC) equipment including Mobility Management Entity (MME), Serving Gateways (SGW) and Packet Data Network Gateways (PGW), providing a 2.5X increase over previously-available performance levels and offering close to bare-metal silicon performance while utilizing standard software API’s. OpenDataPlane applications are supported across Cavium’s multi-core processor product lines including OCTEON and ThunderX™.
Cavium has worked closely with Linaro to support the new OpenDataPlane initiative and has expanded support to the new OCTEON III processor line as well as the ThunderX family of processors. The OCTEON III CN78XX family of multi-core MIPS64 processors builds on the award-winning OCTEON family, with up to 48 next generation cnMIPS64 cores, a wide range of I/O, higher application acceleration for networking, security and storage, larger caches, high speed interfaces such as DDR4 and PCIe Gen3, and multi-chip coherent connectivity using Cavium Coherent Processor Interconnect (CCPI) for enabling high performance applications.
Cavium has been a Linaro member since 2012 when it joined the Linaro Enterprise Group (LEG). Cavium expanded its Linaro membership in 2013 when it joined the Linaro Networking Group (LNG). Cavium’s engineers are active contributors to multiple Linaro projects and Cavium has representation on the Technical Steering Committee for both LEG and LNG.
“OpenDataPlane will allow Cavium customers to run their dataplane applications on a wide range of our processors”, said Raghib Hussain, Corporate VP/GM and CTO. “The ability to write applications once and then use them on many different processors and architectures is very appealing and since it is backed by a true open standards body, customers will not be locked into legacy architectures.”
The OpenDataPlane project is an open-source, cross-platform set of application programming interfaces (APIs) for the networking data plane. ODP embraces and extends existing proprietary, optimized vendor-specific hardware blocks and software libraries to provide interoperability with minimal overhead. Initially defined by members of the Linaro Networking Group (LNG), this project is open to contributions from all individuals and companies who share an interest in promoting a standard set of APIs to be used across the full range of network processor architectures available.
Linaro is a not-for-profit engineering organization with over 180 engineers working on consolidating and optimizing open source software for the ARM architecture, including developer tools, the Linux kernel, ARM power management, and other software infrastructure. Linaro is distribution neutral: it wants to provide the best software foundations to everyone, and to reduce non-differentiating and costly low level fragmentation.
To ensure commercial grade software, Linaro executes comprehensive test and validation on member hardware platforms. The full scope of Linaro’s engineering work is open to all online. To find out more, please visit http://www.linaro.org.
In addition, product demonstrations will be shown in Cavium’s booth located in Hall 2, Stand 2F60.
· Cloud-RAN – Full CRAN Demo on ThunderX ARMv8-A based optimized COTS server working in conjunction with Smart Radio Heads. This demo will also be on display in the ARM® booth (at Hall 6 Stand 6C10).
· vEPC – Cavium will demonstrate vEPC (virtualized LTE core network) running on the ThunderX ARMv8-A processor.
· 100Gbps IPsec using OpenDataPlane™ – Cavium will demonstrate its OCTEON III reaching new performance milestones – processing over 100Gbps of IPsec traffic on a single chip while using OpenDataPlane (ODP) APIs, meeting the demand for massive increases in secure wireless transport throughput for 4G and upcoming 5G infrastructure. The OCTEON product family provides a consistent architecture that scales from one core to 48 and supports an extensive, broad software ecosystem, and is a widely deployed processor family for communications products.
· NFV Service Chaining – Cavium’s LiquidIO and Qosmos® ixEngine® joint demo will show intelligent service chaining of VNFs (virtual network functions), where network traffic is directed through service chains utilizing application intelligence in addition to user information. The Qosmos ixEngine performs Deep Packet Inspection (DPI) based application classification, provides application intelligence to vSwitch (OpenVSwitch). LiquidIO offloads application-aware vSwitching from the server CPU, and preserves server CPU cycles for running VNFs.
· MontaVista® Linux & MV Cloud – MontaVista Software will also be demonstrating Carrier Grade Linux CGE7, MV Cloud and Docker® running on Cavium ThunderX and OCTEON III processors in Hall 7 Stand 7N77.
Cavium is a leading provider of highly integrated semiconductor products that enable intelligent processing in enterprise, data center, cloud and wired and wireless service provider applications. Cavium offers a broad portfolio of integrated, software-compatible processors ranging in performance from 100 Mbps to 100 Gbps that enable secure, intelligent functionality in enterprise, data-center, broadband/consumer and access and service provider equipment. Cavium’s processors are supported by ecosystem partners that provide operating systems, tool support, reference designs and other services. Cavium’s principal office is in San Jose, CA with design team locations in California, Massachusetts, India and China. For more information, please visit: http://www.cavium.com.